Engineer / Senior ESD Engineer

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all.

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities.

Because doing so can fuel the very innovation we are pursuing. The TD ESD/Latch-up Design and Characterization team at Micron Technology, Inc. is seeking an enthusiastic ESD Engineer with the emphasis of conducting ESD/LUP research and experiments to investigate how to design-in the best ESD and latch-up circuit solutions for new memory designs. Job Responsibilities Conduct ESD/LUP research and experiments to investigate how to design-in the best ESD and latch-up design and layout solutions that minimize product defects due to electrostatic discharge (ESD) or latch-up (LUP) events.

Design ESD test structures to fully evaluate the high current and voltage properties of the ESD IO, input or power clamps circuits. Assess the fundamental ESD properties of each type of ESD circuit elements, from active diffusions to BEOL metal layers, by wafer level transmission line pulse (TLP and vf-TLP) measurements to develop on-chip protection from ESD and or LUP events. Analyze ESD and latch-up (LUP) test structure data and generate ESD/LUP design rules and Guidelines.

Develop and expand the ESD and latch-up circuit models based of the measured ESD data. Continually improve product design and reliability by introducing innovative ESD designs. Successful candidates for this position will have: A strong knowledge of advanced semiconductor device physics, including deep submicron CMOS devices.

A good understanding of state-of-the-art CMOS process technology and electrical circuit analysis. Experience in Cadence design tools for design, layout, and verification tools. Hands-on experience in ESD characterization analysis using wafer level transmission line pulse (TLP) test equipment.

Experience waveform generators, oscilloscopes, source/measure units, Agilent and/or Keithley parametric analyzers/testers, and impedance analyzers. Strong data analysis skills are required to extract the high current ESD properties and develop ESD/Latch-up design rules for critical ESD circuits. Strong oral and written communication skills are required to provide ESD/LUP technical leadership with diverse worldwide teams in Design, Product Engineering, R&D characterization, and Quality Assurance teams.

Minimum Qualifications: A BS Electrical Engineering, Microelectronics, or related discipline with 3-5 years of experience, OR A MS in Electrical Engineering, Microelectronics with 1-2 years of experience. Preferred Qualifications: An MS/ in Electrical Engineering, Microelectronics, or related discipline, with 8+ years of experience.