Ciena ASIC Design Engineer Position

Advance your skills with Ciena as a Senior Digital ASIC Design Engineer, focusing on high-performance optical networking. This role promotes a collaborative atmosphere dedicated to personal and professional growth. In this role, you will play a pivotal part in designing and integrating ASIC technologies that are integral to Ciena's WaveLogic products.

The position requires effective communication with engineers and an application of structured problem-solving skills to ensure design excellence. You will also oversee lab validation and enhance technology libraries for semiconductor nodes. Key Responsibilities: • Lead ASIC design and integration for key products • Collaborate with architects on design specifications • Create and manage top-level RTL designs • Enhance technology-specific libraries for ASIC nodes • Perform lab validation for prototypes and production Requirements: • Educational background in Electrical or Computer Engineering • 5+ years of ASIC design experience • Expertise in Verilog, SystemVerilog, and Python • Proficiency in digital design concepts and STA • Ability to work independently in team settings Bring your ASIC design skills to advance telecommunications capabilities at Ciena. #J-18808-Ljbffr