Principal Engineer

Overview Micron Technology is a world leader in memory and storage solutions. Our vision is to transform how the world uses information to enrich life for all. Lead the floor-planning process with emphasis on placement, routing optimization, PDN planning, distribution, and TSV placement.

Execute APR layout to ensure efficient component placement and routing. Optimize design rules for cost, performance, and functionality. Collaborate with Architecture, Process Integration, CAD, Probe, and Assembly teams to define and implement design methodologies and flows.

Conduct timing analysis and power analysis to meet performance and reliability requirements. Analyze power networks to identify and mitigate IR drop and electromigration issues. Perform layout verification tasks including LVS, DRC, and Antenna checks.

Conduct quality checks and maintain documentation. Demonstrate leadership in planning, area/time estimation, scheduling, delegation, and execution to meet project milestones. Verify power networks using TOTEM at post-layout for compliance with design specifications and reliability standards.

Lead reticle experiments and manage tape-out revisions. Participate in design reviews and provide feedback to improve design quality. Debug and resolve physical design issues in collaboration with engineering teams.

Provide experienced technical knowledge to advance innovative solutions. Advise senior management on significant technical issues. Education and experience Employer will accept a Bachelor’s degree in Electrical Engineering, Electronic Engineering, or related field, followed by eight years of progressive, post-baccalaureate experience in the job offered or in an engineering-related occupation.

Responsibilities CMOS process experience in analog layout fundamentals, including matching, electromigration, latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices Layout skills using Cadence Virtuoso and Cadence Virtuoso XL Layout methodology from initial chip plan to tapeout Calibre layout verification tools ASIC style design flows, including floorplanning, synthesis, place/route, layout verification, static timing analysis, formal/layout verification Cadence layout tools, including Innovus or Tempus or Synopsys, including ICC2 or PrimeTime PDN design and evaluation using tools, including TOTEM, RedHawk, or BSEE Benefits and Equal Opportunity Micron offers a choice of medical, dental and vision plans in all locations enabling team members to select plans that best meet their healthcare needs and budget. Benefit programs include paid time off, paid holidays, and family leave. See the Benefits Guide posted on micron.com/careers/benefits for more information.

Micron is an equal opportunity employer; all qualified applicants will receive consideration without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable laws. To learn about your right to work, click here. For more about Micron, visit micron.com/careers.

For US sites: to request assistance with the application process or for reasonable accommodations, contact [email protected] or 1-800-336-8918 (option #3). Micron prohibits child labor and complies with applicable laws and standards. Micron does not charge candidates recruitment fees or collect payments for employment.

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