Senior Physical Design Engineer

6+ years of hands-on experience with physical design implementation flows, including synthesis, place-and-route, timing closure, and signoff support. Proficiency with Synopsys or Cadence toolsets (e.g., ICC2/Fusion Compiler or Innovus, PrimeTime/Tempus, StarRC). Strong scripting and automation skills in Python, TCL, Shell, or Perl.

Familiarity with low-power implementation considerations, physical verification tools (Calibre/ICV), and deep submicron design challenges. Strong analytical and debugging skills, attention to details, and problem-solving ability using data-driven approach for complex flow or design issues #J-18808-Ljbffr