Physical Design Engineer

Acceler8 Talent is looking for an experienced Physical Design Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! As a Physical Design Engineer, you would contribute to the company's silicon and physical design methodology with a scalable solution across blocks, subsystems, and full-chip designs from RTL to GDS.

You would own entire subsystems and plan and drive intermediate and sign-off reviews as well as execution progress reporting based on key PPA metrics. This role might be ideal for you if you have: RTL-to-silicon experience in driving physical design for ASIC/SOC subsystems/top‑level functions Production‑proven experience with floorplanning, place and route, clock tree insertion and analysis, timing analysis, physical verification, electrical sign‑off and related areas Collaborated with design, verification, and DFT teams BSEE/CE or MSEE/CE + five years of professional industry experience This is a hybrid role based in the San Francisco Bay Area. Base Salary: $200,000 - $300,000 + equity + benefits #J-18808-Ljbffr