Application Specific Integrated Circuit Design Engineer (Austin)
Trilyon, Inc.
Job Description
Position: ASIC/RTL Design Engineer Duration: 12 months Location: San Jose, CA/Austin,TX MUST HAVE skills: - Experience in Designing RTL block for an SOC. - Must have proven track record of ASIC design on several production tape-outs. - Experience with Lint, CDC, RDC. KEY RESPONSIBILITIES: • Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. • Collaborate with architecture and hardware teams to understand the requirements. • Work with verification and physical design teams to achieve high quality design and successful tape out. • Design and implement logic functions that enable efficient test and debug. • Participate in silicon bring-up for features owned. • Contribute in cross-functional teams to solve novel problems across multiple functional areas in development of required features. • Implement automation to increase design team efficiency. Required: • 5-6+ years' experience required • Must have proven track record of ASIC design on several production tape-outs. • Experience in Designing RTL block for an SOC. • Experience in integrating ASIC IP into an SOC. • Experience with synthesis, static timing analysis & optimizations.
Nice-to-have: • Experience writing timing constraints and exceptions. • Experience with automation using scripting techniques such as PERL, Python or Tcl • Experience in Power-saving techniques. • Experience with Arm architecture and APB, AXI, CHI protocols. • Experience with design involving Interconnects. • Ability to develop clear and concise engineering documentation. • Ability to organize and present complex technical information. • Strong verbal and written communication skills