Analog Layout Engineer at Ciena

Elevate your career with Ciena as a Principal Analog Layout Engineer specializing in high-speed analog circuit design. This role focuses on advanced CMOS technology in a flexible, empowering work environment. As a key member of Ciena’s high-speed connectivity team, you will apply your 5+ years of experience in analog circuit design, specifically targeting DAC and ADC solutions.

You’ll collaborate with senior engineers, leveraging industry-standard layout tools to ensure precision and functionality in complex layouts, fostering innovation and technical excellence. Key Responsibilities: • Develop and optimize block and macro level layouts • Conduct feasibility studies with senior analog designers • Write automation scripts for layout improvements • Perform verification checks to ensure layout quality • Mentor junior engineers in layout best practices Requirements: • Bachelor's degree in Electrical Engineering or related field • 5+ years in analog and mixed-signal layout design • Proficiency in Cadence Virtuoso and Siemens Calibre • Strong problem-solving and analytical skills • Knowledge of semiconductor manufacturing processes Contribute to groundbreaking analog technologies at Ciena, ensuring top-notch quality and innovation in every design. #J-18808-Ljbffr